Specifications

Each of these data selectors/multiplexers contains inverters and drivers to supply fully complementary, on-chip, binary decoding data selection to the AND-OR invert gates. Separate strobe inputs are provided for each of the two four-line sections.

Features

  • Permits multiplexing from N lines to 1 line
  • Performs at parallel-to-serial conversion
  • Strobe (enable) line provided for cascading (N lines to n lines)
  • High fan-out, low impedance, totem pole outputs
  • Typical power dissipation: 31mW 

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